Real-time unified architecture for forward/inverse discrete cosine transform in high efficiency video coding

Faculty Engineering Year: 2017
Type of Publication: ZU Hosted Pages: 381-387
Authors:
Mohamed Sharaf Ismail Sayed
Journal: IET Circuits, Devices & Systems The Institution of Engineering and Technology Volume: vol. 11
Keywords : Real-time unified architecture , forward/inverse discrete cosine    
Abstract:
In High Efficiency Video Coding (HEVC) standard, higher video resolutions employ larger integer Discrete Cosine Transform (DCT)/inverse DCT (IDCT) block sizes. In this study, the authors propose two high-throughput unified DCT/IDCT architec
    
     
 
       

Author Related Publications

  • Mohamed Sharaf Ismail Sayed , "Interpolation-Free Fractional-Pixel Motion Estimation Algorithms with Efficient Hardware Implementation", Springer Journal of Signal Processing Systems, 2010 More
  • Mohamed Sharaf Ismail Sayed , "Low-Complexity Algorithm for Fractional-Pixel Motion Estimation", IEEE International Conference on Image Processing ICIP’09, 2009 More
  • Mohamed Sharaf Ismail Sayed , "A Fast Architecture for Exhaustive Search Block Matching Algorithm with MPEG-4 Applications", IEEE International Conference on Electronics, Circuits and Systems ICECS’09, 2009 More
  • Mohamed Sharaf Ismail Sayed , "Video-Active RAM: A Processor-in-Memory Architecture for Video Coding Applications", IEEE International Symposium on Circuits and Systems ISCAS, 2010 More
  • Mohamed Sharaf Ismail Sayed , "Low Complexity Contrast Enhancement Algorithm for Nighttime Visual Surveillance", International Conference on Intelligent Systems Design and Applications ISDA, 2010 More

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