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Speeded up robust features for efficient iris recognition
Faculty
Engineering
Year:
2016
Type of Publication:
ZU Hosted
Pages:
Authors:
Hanaa Shaker Abdelbaset Ali
Staff Zu Site
Abstract In Staff Site
Journal:
Signal, Image and Video Processing Springer
Volume:
Keywords :
Speeded , robust features , efficient iris recognition
Abstract:
Iris recognition system is one of the biometric systems in which the development is growing rapidly. In this paper, speeded up robust features (SURFs) are used for detecting and describing iris keypoints. For feature matching, simple fusion
Author Related Publications
Hanaa Shaker Abdelbaset Ali, "Spectrum Sensing Optimization and Performance Enhancement of Cognitive Radio Networks", Springer, 2016
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Hanaa Shaker Abdelbaset Ali, "An Efficient Source–Channel Coding for Wireless Image Transmission Over Underwater Acoustic Channel", Springer US, 2017
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Hanaa Shaker Abdelbaset Ali, "Performance Evaluation of A Novel IMS-based Architecture for LTE-WIMAX-WLAN Interworking", IEEE, 2015
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Hanaa Shaker Abdelbaset Ali, "Piecewise linear model for haze level estimation and an efficient image restoration technique", Elsevier, 2017
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Hanaa Shaker Abdelbaset Ali, "Entropy with Local Binary Patterns for Efficient Iris Liveness Detection", Springer US, 2017
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Department Related Publications
Hanaa Shaker Abdelbaset Ali, "Performance Evaluation of A Novel IMS-based Architecture for LTE-WIMAX-WLAN Interworking", IEEE, 2015
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Omar Zakaria Zenati Najjar , "Enhanced digital predistorter based on normalized least mean square and particle swarm optimization algorithms", IEEE, 2017
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Mohamed Sharaf Ismail Sayed , "Efficient Low-Power Digital Baseband Transceiver for IEEE 802.15.6 Narrowband Physical Layer", IEEE, 2018
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Walid Saber Abdelaleem Ibrahiem Eldeeb, "Analysis of the Nonlinear Impairments on the DWDM Optical Communication Systems", The Egyptian International Journal of Engineering Sciences and Technology, 2016
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Mohammed Farahat Abdelhamied Abdelrahman, "CMOS single-stage fully differential telescopic cascode OTA with gain boosted technique for 14Bit 100MSps pipelined ADC", IEEE, 2016
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